Line-to-ground capacitance calculation for VLSI: a comparison

A comparison is made between various approximations of the line-to-ground capacitance problem in a VLSI environment. It is shown that with up-to-date dimensions, the simple parallel-plate model is no longer adequate. However, easy-to-use and fast-to-compute formulas exist that result in accurate and reliable capacitance values. The parasitic capacitance problem is three-dimensional by nature. Three-dimensional calculations, however, are very expensive and thus seem to be an inadequate approach for VLSI. With sufficient accuracy the problem can be reduced to a set of two-dimensional ones. Capacitive couplings are described by three different components [l]: